ACQ400_XRM (xrmIoc)
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acq400_PermitLut.h
1/*
2 * acq400_PermitLut.h: one acq400_PermitLut per LUT row
3 *
4 * Created on: 19 Aug 2026
5 * Author: pgm
6 */
7
8#ifndef XRMIOCAPP_SRC_ACQ400_PERMITLUT_H_
9#define XRMIOCAPP_SRC_ACQ400_PERMITLUT_H_
10
11#include "acq400_asyn_common.h"
12#include "acq400_Permit.h"
13#include <set>
14
15/* default. nb: not used, settable from st.cmd */
16#define MAX_ROWS 16 //* << LUT size from FNAL spec, one addr per row.
17
18
19#define PS_PRMT_LUT_SOFT_EVENT "PRMT_LUT_SOFT_EVENT" // int, address
20#define PS_PRMT_LUT_EVENT "PRMT_LUT_EVENT" // int, scalar
21#define PS_PRMT_LUT_TH_AI "PRMT_LUT_TH_AI" // u32, vector NCHAN
22#define PS_PRMT_LUT_TH_DI "PRMT_LUT_TH_DI" // 2* UInt32Digital vector per site, max 2 sites
23#define PS_PRMT_LUT_COMMIT "PRMT_LUT_COMMIT" // atomic update
24
25#define PS_PRMT_LUT_LAST_EVENT "PRMT_LUT_LAST_EVENT" // last event accepted
26
27/**< NTTable view of the permit lut - show Event and Active selection for LUT row
28 * "Active" : 32 bit mask showing participating channels - AI, DI, same treatment.
29 * empty site? Active=0
30 * Phoebus displays decimal integer.
31 * - a bit mask is indecipherable in decimal
32 *
33 * Sx COL encoding : ACTIVE*10000, LAST*100, FIRST*1
34 * - eg 323201 : 32 active channels, LAST=32 FIRST=1
35 * - eg 23201 : 2 active channels, LAST=32, FIRST=1
36 * - eg 40401 : 4 active channels, LAST=4, FIRST=1
37 * - eg 43229 : 4 active channels, LAST=32, FIRST=29
38 */
39
40#define PS_PRMT_LUT_EV_COL "PRMT_LUT_EV_COL"
41#define PS_PRMT_LUT_S1_COL "PRMT_LUT_S1_COL"
42#define PS_PRMT_LUT_S2_COL "PRMT_LUT_S2_COL"
43#define PS_PRMT_LUT_S3_COL "PRMT_LUT_S3_COL"
44#define PS_PRMT_LUT_S4_COL "PRMT_LUT_S4_COL"
45#define PS_PRMT_LUT_S5_COL "PRMT_LUT_S5_COL"
46#define PS_PRMT_LUT_S6_COL "PRMT_LUT_S6_COL"
47#define PS_PRMT_LUT_COL_ROW_NUM "PRMT_LUT_COL_RN"
48
49/** @@todo may not be needed */
51 unsigned short event;
52 unsigned short commit;
53 unsigned short ai_count;
54 unsigned short di_count;
55 unsigned* th_ai;
56 unsigned* th_di;
57};
58
59#define NPAIR 2
60
62 unsigned short event; /**< event value to select row */
63 epicsInt16* ai_th_pairs;/**< agg NCHAN LOW, HI pairs */
64 epicsInt32* di_pairs; /**< agg NDI32 VALUE, ACTIVE pairs */
65
66 bool operator<(const PRMT_LUT_ROW& other) const {
67 return event < other.event;
68 }
69};
70
72 bool operator()(PRMT_LUT_ROW& a, PRMT_LUT_ROW &b) const {
73 return a.event < b.event;
74 }
75};
76
77class acq400_PermitLut: public acq400_asynPortDriver {
78/**< singleton */
79 static int verbose;
80 PermitDSP& dsp;
81
82 int P_PRMT_LUT_SOFT_EVENT;
83 int P_PRMT_LUT_EVENT;
84 int P_PRMT_LUT_TH_AI;
85 int P_PRMT_LUT_TH_DI;
86 int P_PRMT_LUT_COMMIT;
87 int P_PRMT_LUT_LAST_EVENT;
88
89 int P_PRMT_LUT_EV_COL;
90 int P_PRMT_LUT_S1_COL;
91 int P_PRMT_LUT_S2_COL;
92 int P_PRMT_LUT_S3_COL;
93 int P_PRMT_LUT_S4_COL;
94 int P_PRMT_LUT_S5_COL;
95 int P_PRMT_LUT_S6_COL;
96 int P_PRMT_LUT_COL_ROW_NUM;
97
98 PRMT_LUT_ROW lut_rows[MAX_ROWS]; // lazy allocation
99 std::set<PRMT_LUT_ROW> event_set;
100
101 static acq400_PermitLut* _instance;
102
103 epicsInt8 c_rownum[MAX_ROWS];
104 unsigned cols[MAX_SITES+1][MAX_ROWS]; /** [0]: event, [123456]: Sn Active mask */
105
106 unsigned short last_load_event;
107
108
109 void set_EV_col(int addr, unsigned event);
110 void set_AI_selection_col(int addr, short ai_th_pairs[], int npairs);
111 void set_DI_selection_col(int addr, epicsInt32 di_pairs[], int npairs);
112
113 void doDiagsCallbacks();
114 virtual void task();
115 static void task_runner(void *drvPvt);
116
117 bool dirty;
118protected:
119 acq400_PermitLut(const char *portName, int max_addr);
120
121 virtual asynStatus writeInt32(asynUser *pasynUser, epicsInt32 value);
122
123 virtual asynStatus writeInt16Array(asynUser *pasynUser, epicsInt16 *value,
124 size_t nElements);
125 virtual asynStatus doCallbacksInt16Array(epicsInt16 *value,
126 size_t nElements, int reason, int addr);
127
128 virtual asynStatus writeInt32Array(asynUser *pasynUser, epicsInt32 *value,
129 size_t nElements);
130public:
131 void check_if_fmt_event_trigger(const FMT& fmt);
132
133 static acq400_PermitLut& instance();
134 static void create_instance(const char *portName, int max_addr);
135};
136
137#endif /* XRMIOCAPP_SRC_ACQ400_PERMITLUT_H_ */
Definition acq400_Permit.h:71
void check_if_fmt_event_trigger(const FMT &fmt)
Definition acq400_PermitLut.cpp:293
acq400_asynPortDriver(const char *portName, int maxAddr, int interfaceMask, int interruptMask, int asynFlags, int autoConnect, int priority, int stackSize)
Definition acq400_asynPortDriver.cpp:16
Definition acq400_PermitLut.h:71
Definition acq400_PermitLut.h:61
unsigned short event
Definition acq400_PermitLut.h:62
epicsInt16 * ai_th_pairs
Definition acq400_PermitLut.h:63
epicsInt32 * di_pairs
Definition acq400_PermitLut.h:64
Definition acq400_PermitLut.h:50
struct FMT_ROW FMT[FMT_ROWS]
FMT : FNAL Multicast Table.
Definition xrm_structs.h:57